EC408 DSP Systems and Architecture

Course Name: 

EC408 DSP Systems and Architecture


B.Tech (ECE)


Elective (Ele)

Credits (L-T-P): 

(3-0-0) 3


Course Objectives: On completion of the course, the students should be able to appreciate the various strategies used in VLSI implementation of DSP systems. 
Course Outcomes: Students are expected to apply concepts to design and implement various Signal Processing Algorithms on FPGAs / ASICs etc. 
Course Content:
Introduction to the Course and Recap of DSP Concepts, Implementation of Digital Filters and Discrete transforms - FIR,IIR filters, FFT, DCT, Finite Word length effects and low power implementation strategies, Implementation Strategies at arithmetic level - Need for alternate number systems, Residue number system, Double base number system, Redundant number system, Adder Architectures, Multiplier Architectures, Algorithms for fast convolution - Cook Toom algorithm and modified Cook Toom Algorithm, Winograd Algorithm and modified Winograd Algorithm, Iterative convolution, Performance Improvement and Power Estimation Strategies - Data Flow representations, Pipelining and Parallel processing, retiming, systolic architectures, Probabilistic Power Estimation Tech,  SELF STUDY COMPONENT - Speech Coding, Data Compression etc. 


K. K. Parhi, '' VLSI Signal Processing Systems : Design and Implementation" John Wiley , 1999.
Lars Wanhammer, '' DSP Integrated Circuits ", Academic Press, 1999.
Roger Woods, , " FPGA based implementation of Signal Processing Systems " , John Wiley
Uwe Meyers - Baese, " Digital Signal Processing with FPGAs ", Springer 2007.
B. Parhami, " Computer Arithmetic Algorithms and Hardware Designs ", Oxford, 2000
J. P. Deschamps, G J A Bioul, G Sutter, ``Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems”, Wiley, 2000

Contact us

Dr. U. Shripathi Acharya,  Professor and Head, 
Department of E&C, NITK, Surathkal
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

  • Hot line: +91-0824-2473046

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