EC901 Modeling and Design of High-Speed VLSI Interconnects

Course Name: 

EC901 Modeling and Design of High-Speed VLSI Interconnects

Programme: 

Ph.D

Credits (L-T-P): 

(4-0-0) 4

Content: 

Detailed study of various problems in modeling and design of high-speed VLSI interconnect at both IC and packaging levels, including device and interconnect modeling, interconnect topology optimization for delay minimization, wire sizing and device sizing for both delay and performance optimization, and clock network design for high performance systems. Noise issues and reliability

References: 

William J. Dally, John W. Poulton, “Digital Systems Engineering, “Cambridge University Press 1999
Howard Johnson, Martin Graham, “High-Speed Digital Design” A handbook of black magic, “Prentice Hall 1993.
Recent publications from IEEE, IEICE and ACM Journals
 

Contact us

Dr. U. Shripathi Acharya,  Professor and Head, 
Department of E&C, NITK, Surathkal
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

  • Hot line: +91-0824-2473046

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