EC200 Digital System Design

Course Name: 

EC200 Digital System Design

Programme: 

B.Tech (ECE)

Semester: 

Third

Category: 

Programme Core (PC)

Credits (L-T-P): 

(3-1-0) 4

Content: 

Introduction to Digital Systems and Boolean Algebra Binary, Logic Minimization and Implementation, Karnaughmaps, NAND and NOR implementation, Quine-McCluskey method, Logic families, Combinational Logic Multi level gate circuits, Parity circuits and comparators, Representation of signed numbers, Introduction to HDL (VHDL /Verilog), Register transfer language, Sequential Logic Latches and flip-flops, Registers and counters, HDL description of sequential circuits, State Machine Design, State machine as a sequential controller, Moore and Mealy state machines, Derivation of state graph and tables, Sequence detector, equivalent state machines, State machine modelling based on HDL, Linked state machines, Advanced Topics: Static and Dynamic hazards; race free design;

References: 

Charles. H. Roth, Jr., Fundamentals of Logic Design, Fifth Edition, Thomson Brooks /Cole, 2005. J.F.Wakerly,
Digital Design Principles and Practices, PH, 1999.
D.D. Givone, Digital Principles and Design, TMH, 2002
Morris. M. Mano, Michael D. Ciletti, Digital Design, Fourth Edition, Prentice-Hall India. 2008.
S. Palnitkar, Verilog HDL: A Guide to Digital Design and Synthesis, Second Edition, Pearson Education, 2004.
S. Brown and Z. Vranesic, Fundamentals of digital logic with Verilog design, Third Edition, McGraw-Hill, 2013
Charles. H. Roth, Jr., Digital System Design using VHDL, Indian Edition, Thomson Brooks /Cole, 2006.

Department: 

Electronics and Communication Engineering(ECE)
 

Contact us

Dr. T. Laxminidhi,  Professor and Head, 
Department of E&C, NITK, Surathkal
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

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