Introduction to VLSI design automation: VLSI design methodologies, use of VLSI EDA tools, Algorithmic Graph Theory, computational Complexity; Partitioning: KL algorithm, FM algorithm, EIG Algorithm, Simulated Annealing. Floorplanning and placement: Sliced and non-sliced planning, Polish expression, Simulated annealing, partition based placement; ILP & mathematical programming, partition based, force directed, Fast-Place, quadratic placement algorithms. Routing: Global routing, detailed routing, graph models, Line Search, Maze Routing, Channel routing; via minimization, clock and power routing. High Level Synthesis: Introduction to HDL, HDL to DFG, operation scheduling: constrained and unconstrained scheduling, ASAP, ALAP, List scheduling, Force directed scheduling, operator binding; Static Timing Analysis: Delay models, setup time, hold time, cycle time, critical paths, Topological vs logical timing analysis, False paths, Arrival time, Required arrival Time, Slacks. Advanced VLSI Design Automation: Physical Synthesis, Optical Proximity correction, Interconnect issues.