EC445 Techniques in Low Power VLSI

Course Name: 

EC445 Techniques in Low Power VLSI


B.Tech (ECE)


Programme Specific Electives (PSE)

Credits (L-T-P): 

(3-1-0) 4


Introduction to Low Power VLSI. Modeling and Sources of Power consumption. Power estimation at different design levels. Power optimization for combinational circuits and sequential circuits Voltage scaling Approaches. Low energy computing using energy recovery techniques. Low Power SRAM architectures. Software design for low power. Computer Aided Design Tools. Case studies Recent trends in low-power design for mobile and embedded application.


Kaushik Roy and Sharat Prasad, Low-Power CMOS VLSI design, John Wiley, 2000.
K.-S. Yeo and K. Roy, Low-Voltage Low-Power Subsystems, McGraw Hill, 2004.
Anantha P.Chandrakasan & Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publications, 1995.
Gary K. Yeap, Practical Low Power Digital VLSI Design, Kluwer Academic Publications, 1998.
L. Benini and G. De Micheli, Dynamic Power Management Design Techniques and CAD Tools, Springer, 1998.
S. G. Narendra and A. Chandrakasan, Leakage in Nanometer CMOS Technologies, Springer, 2005.
Edgar Sánchez-Sinencio, Andreas G. Andreou, Low-Voltage/Low-Power Integrated Circuits and Systems: Low-Voltage Mixed-Signal Circuits, IEEE Press Series on Microelectronic Systems 1999


Electronics and Communication Engineering(ECE)

Contact us

Prof. N. Shekar V. Shet, Professor and Head, 
Department of ECE, NITK, Surathkal
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

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