EC449 Algorithms and Architectures for Signal Processing

Course Name: 

EC449 Algorithms and Architectures for Signal Processing


B.Tech (ECE)


Programme Specific Electives (PSE)

Credits (L-T-P): 

(3-1-0) 4


Representation of digital signal processing systems: block diagrams, signal flow graphs, data-flow graphs, dependence graphs; pipelining and parallel processing for high-speed and low power realizations; iteration bound, algorithms to compute iteration bound, retiming of data-flow graphs; unfolding transformation of data-flow graphs; systolic architecture design, architectures for real and complex fast Fourier transforms; stochastic logic based computing, computing digital filters, arithmetic functions and machine learning functions using stochastic computing; Neural Network architectures.


K.K. Parhi, VLSI Digital signal processing systems: Design and implementation, John Wiley, 1999.
Lars Wanhammar, DSP Integrated Circuits, Academic Press, 1999
Sen M. Kuo Bob H. LeeWenshun Tian, "Real‐Time Digital Signal Processing: Implementations and Applications", 2006 John Wiley & Sons, Ltd
Roger Woods, John McAllister, Gaye Lightbody, Ying Yi, “FPGA Based Implementation of Signal Processing Systems”, John Wile, 2017
U. Meyer-Baese, “Digital Signal Processing with Field Programmable Gate Arrays”, 4th Ed. Springer, 2014


Electronics and Communication Engineering(ECE)

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Dr. Ashvini Chaturvedi,  Professor and Head, 
Department of E&C, NITK, Surathkal
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

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