Rekha S.

Designation: 

Assistant Professor

Date of Joining at NITK: 

Friday, December 7, 2007

Professional Experience: 

Total: 25 years

Contact Details

E-mail: 

rsbhat_99[at]yahoo[dot]com
rekhabhat [at] nitk.edu.in

Telephone: 

Office. : 0824-2473518
Faculty (author) Identifiers

ORCID iD: 

0000-0002-9166-1466

Scopus Author ID: 

55316012200
Academic Background
• Ph.D. at NITK • M.Tech., Mangalore Univ., 2000 • BE, SJCE, Mysore Univ., 1991
Areas of Interest

Analog and Digital VLSI Design, Control Systems, Logic Synthesis Techniques

Significant Projects
  • Non-Invasive Hemoglobin Count estimation Using Pulse Oximetry Technique (SMDP-VLSI C2SD)
Supervision of Ph.D

Completed :1
Hanumantha Rao G.

Submitted : 1
Sreenivasulu Polineni

Ongoing: 3
Kirankumar Lad
Muhammed Mansoor.C.B
Puneeth

Significant Publications

Papers published in International Journals

  1. Polineni, S., S. Rekha, Bhat, M.S,, “A fully differential switched capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications,” IET Circuits, Devices and Systems, 2021, pp. 1-15, https://doi.org/10.1049/cds2.12014.
  2. Muhammed Mansoor C. B., Hanumantha Rao G., Rekah S., “Low Power Fast Settling Switched Capacitor PTAT Current Reference Circuit for Low Frequency Applications”, Advances in Science, Technology and Engineering Systems Journal (ASTESJ), Vol.5, No. 6, pp. 865-870, Nov. 2020, DOI: 10.25046/aj0506103.
  3. Hanumantha Rao G., Sreenivasulu P., S. Rekha, M. S. Bhat, “A 0.3 V, 2.4 nW, 100 Hz fourth-order LPF for ECG signal processing”, International Journal of Circuit Theory and Applications, Wiley Publishers, July 2020. DOI:10.1002/cta.2839.
  4. Polineni, S.,  M.S. Bhat and Rekha S., “A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique”, Circuits Systems and Signal Processing (CSSP), Springer Publications (SCIE, Scopus), No. 5, 2020, https://doi.org/10.1007/s00034-020-01437-3.
  5. H. Lad Kirankumar, S. Rekha, Tonse Laxminidhi, “A Dead-Zone-free Zero Blind-zone High-speed Phase frequency Detector for Charge-Pump PLL”, Circuits, Systems and Signal Processing, Springer,  doi: 10.1007/s00034-020-01366-1, (SCIE, Scopus), Feb. 2020, pp. 1-14.
  6. G. Hanumantha Rao and S. Rekha, “An area-efficient, large time-constant log domain filter for low- frequency applications”, International Journal of Circuit Theory and Applications, Wiley Publishers, 2019, pp.1-11, https://doi.org/10.1002/cta.2726.
  7. Sreenivasulu, G. Hanumantha Rao, S. Rekha, M. S. Bhat, "A 0.3 V, 56 dB DR, 100 Hz fourth order low-pass filter for ECG acquisition system", Microelectronics Journal, Elsevier Publications, Vol. 94, 2019, https://doi.org/10.1016/j.mejo.2019.104652.
  8. Hanumantha Rao G. and Rekha S., “A 0.8-V, 55.1-dB DR, 100 Hz Low-pass Filter with Low-power PTAT for Bio-medical Applications”, IETE Journal of Research, Taylor & Francis, DOI: 10.1080/03772063.2019.1682074, 2019.
  9. Hanumantha Rao G. and Rekha S., “Time Constant Enhancement Technique for Low-Frequency Filters”, Circuits, Systems, and Signal Processing, Springer, DOI: 10.1007/s00034-019-01221-y, 1-14, 2019.
  10. Rekha S., Vasantha M.H. and  Laxminidhi T., "Ultra low voltage, power efficient continuous time filters in 180 nm CMOS technology", IET  Circuits, Devices & Systems, 2019.
  11. Puneeth Kumar and S. Rekha, “Fast start crystal oscillator design with negative resistance control”, Integration, the VLSI Journal, Elsevier Publications (SCIE, Scopus), December 2018.  
  12. G. Hanumantha Rao and S. Rekha, “Low Voltage, Low Power Gm-C Filter for Low Frequency Applications”, Journal of Low power electronics (JOLPE), American Scientific Publishers, Vol. 14, No.2, 1-9 pages, June 2018. (Scopus).
  13. Rekha S.,Laxminidhi T., “Low voltage, Low power Chebyshev filter in 0.18 µm CMOS Technology”, Journal of Circuits, Systems and Computers (JCSC), World Scientific Publishing Company,  Vol. 22, No. 7, 1350053 – 1-18 pages, July 2013. (SCIE, Scopus Indexed).
  14. Rekha S. and Laxminidhi T., “A low power, fully differential bulk driven OTA in 180 nm CMOS Technology”, International Journal of Computer and Electrical Engineering(IJCEE)  Vol. 4, No. 3, June 2012. (EI (INSPEC, IET), Google scholar).
  15. Rekha S., Laxminidhi T.,“Common Mode Feedback circuits for Low Voltage Fully Differential Amplifiers” - Journal of Circuits, Systems and Computers (JCSC), World Scientific Publishing Company, Vol. 25, No.10, 1650124 – 1-12 pages, May 2016. (SCIE, Scopus Indexed).
  16. Rekha S., Laxminidhi T., “ 0.5 V, 5 MHz Active-RC Biquad filter in 90 nm CMOS Technology” –  Int. J. Circuits & Architecture Design, Inderscience Publications, Vol.2, No. 2, 2016, pp. 142-154, Feb. 2017. (CNPIEC, Google Scholar, Proquest)

Papers published in International Conferences

  1. Hanumantha Rao G., Sreenivasulu P., Rekha S., M. S. Bhat, “ Ultra Low-voltage, Low-power Fourth-order Butterworth LPF for ECG Signal Processing”, 2nd International Conference on VLSI Device, Circuit and System (VLSI-DCS 2020), Kolkata, India, March 21-22, 2020.
  2. Anuradha Patil, Mansoor Muhammed, Hanumantha G. Rao and Rekha S., “Low power log-domain Filter”, 16th IEEE India Council International Conference (INDICON 2019), Marwadi Univ., Rajkot, 13-15 December 2019.
  3. Hanumantha Rao G., Muhammed Mansoor C. B. and Rekha S., “ A 0.8 V, 5 nA PTAT current reference circuit with improved supply voltage sensitivity”, IEEE sponsored Global Conference for advancement in Technology (GCAT 2019), 18-20 October 2019.
  4. Muhammed Mansoor C. B. and Rekha S., “Low power active-RC filter for ECG detection”, IEEE sponsored Global Conference for advancement in Technology (GCAT 2019), 18-20 October 2019.
  5. Y. P. Yeshwanth, T. P. Vara Prasad, Vivek Mudadla, Pavan and Rekha S., “Ultra low voltage, low power active-RC filter in 90 nm CMOS technology”, IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) 2019, MIT, Manipal, 11-12 August, 2019 - won the Best Paper Award.
  6. G. Hanumantha Rao and S. Rekha, “A 0.5 V, 1 nA Switched Capacitor PTAT Current reference circuit”, Proc. of IEEE International Conference on Modeling of Systems Circuits and Devices (MOS-AK India 2019), 24-27 February, 2019.
  7. Sumit Kumar, Hanumantha Rao G. and Rekha S., “A 1-V, 8.6 nA Resistor-less PTAT current reference with startup circuit”, Proc. of 15th IEEE India Council International Conference (Indicon 2018), Amrita Institute of technology, 16-18 December 2018.  
  8. Amaljith M. K., Hanumantha Rao G. and Rekha S., “Low voltage current reference circuit with low temperature coefficient”, IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) 2018, MITE, Moodbidri, 13-14 August, 2018.
  9. Riya Raj, M. S. Bhat and Rekha S., “Library characterization: Noise and Delay Modeling”, IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) 2018, MITE, Moodbidri, 13-14 August, 2018.
  10. Shreenivasa K., M. S. Bhat and Rekha S., “A scheme for efficient and equitable use of public utilities through supervisory and distributed control”, IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) 2018, MITE, Moodbidri, 13-14 August, 2018.
  11. Puneeth Kumar and Rekha S., “Fast startup Crystal Oscillator Design”, presented at IEEE International Conference on Energy, Communication, Data Analytics & Soft computing (ICECDS)-2017, SKR Engg. College, Tamil Nadu, August 1st-2nd, pp. 3844-3849, 2017.
  12. Alison E. Viegas, Sudipta Dutta, Rekha S., M.S.Bobji, Srinivasan Raghavan and Navakanta bhat, ”3D Capacitors using Porous Anodic Alumina Oxide”, 19th International Workshop on the physics of semiconductor devices (IWPSD)-2017, December 11-15, 2017, IIT Delhi.
  13. Alison E. Viegas, Rekha S., Srinivasan Raghavan and Navakanta Bhat, “A novel 3D Capacitor Design using Nanoporous and nanotubular Anodic Oxides”, presented at 8th ISSS International Conference on Smart Materials, Structures and Systems, IISc, Bengaluru, July 5-7 2017.
  14. Hanumantha Rao G. and  Rekha S., “Low Voltage, low power Transconductor for low frequency Gm-C Filters”, presented at 21st International Symposium on VLSI Design and Test (VDAT 2017), 29th June - 2nd July 2017, IIT Roorkey.
  15. Rekha S. and Laxminidhi T., “Ultra low power Active-RC filter in 180 nm CMOS technology”, Proc. of 11th International Workshop IEEE on Electronics, Control, Measurement, Signals and their application to Mechatronics (ECMSM), Toulouse, France, June 21-23, 2013. DOI: 10.1109/ECMSM.2013.6648930
  16. Rekha S. and Laxminidhi T., “Effect of Finite gain and Bandwidth of feed- forward compensated OTA on Active-RC integrators: A case study”, International Symposium of Electronic System Design (ISED) 2012, Kolkata, December 19-22, 2012. DOI: 10.1109/ISED.2012.44
  17. Rekha S. and Laxminidhi T., “Effect of parasitics of feed-forward compensated OTA on Active-RC integrators”, 3rd international conference on Advances in Power Electronics and Instrumentation Engineering (PEIE 2012), Bangalore, Aug. 03-04, 2012.
  18. Rekha S. and Laxminidhi T., “Low power, fully differential, feed-forward compensated bulk driven OTA”, Proc. 8th international conference organized by Electrical Engineering/ Electronics, Computer, Telecommunications and Information Technology Association(ECTI), Thailand, Thailand, May 17-19, 2011. DOI: 10.1109/ECTICON.2011.5947778
  19. Rekha S. and Laxminidhi T., “A low power, fully differential bulk driven OTA in 180 nm CMOS Technology”, Proc. 3rd international conference on Signal acquisition and Processing, Singapore, Feb. 26-28, 2011.

BOOKS

1. " Op-amps and Linear Integrated Circuits"  - Ramakant A. Gayakwad, Revised fourth edition, Pearson Publishers, Contents contribution for Indian Adaptation by Rekha S.
Achievements

1. First Rank in MTech (Industrial Electronics), KREC, Mangalore University, 2000
2. Won first prize for the M.Tech. Project work in TECHNOFEST 2000 conducted under Electronics Education Network Project (EENP) of Swiss Agency for Development and Cooperation (SDC), Dept. of E&C, NITK.
3. Best paper award for the paper titled, "Ultra low voltage, low power active-RC filter in 90 nm CMOS technology" in IEEE Intl. conference, DISCOVER 2019.

 

Contact us

Dr. Ashvini Chaturvedi,  Professor and Head, 
Department of E&C, NITK, Surathkal, 
P. O. Srinivasnagar,
Mangalore - 575 025 Karnataka, India.

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